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RFK25N18, RFK25N20
Data Sheet October 1998 File Number 1500.3
25A, 180V and 200V, 0.150 Ohm, N-Channel Power MOSFETs
These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA09594.
Features
* 25A, 180V and 200V * rDS(ON) = 0.150
Symbol
D
G
Ordering Information
PART NUMBER RFK25N18 RFK25N20 PACKAGE TO-204AE TO-204AE BRAND RFK25N18 RFK25N20
S
NOTE: When ordering, use the entire part number.
Packaging
JEDEC TO-204AE
DRAIN (FLANGE)
SOURCE (PIN 2) GATE (PIN 1)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
RFK25N18, RFK25N20
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified RFK25N18 Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . TL 180 180 25 60 20 150 1.2 -55 to 150 260 RFK25N20 200 200 25 60 20 150 1.2 -55 to 150 260 UNITS V V A A V W W/oC
oC oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS TEST CONDITIONS ID = 250A, VGS = 0 180 200 VGS(TH) IDSS VGS = VDS, ID = 250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC 2 VGS = 0V, VDS = 25V f = 1MHz (Figure 9) 40 150 300 120 4 1 25 100 0.150 3.75 80 225 400 200 3500 900 400 0.83 V V V A A nA V ns ns ns ns pF pF pF
oC/W
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage RFK25N18 RFK25N20 Gate Threshold Voltage Zero Gate Voltage Drain Current
Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Drain to Source On Voltage (Note 2) Turn On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Case
IGSS rDS(ON) VDS(ON) td(ON) tr td(OFF) tf CISS COSS CRSS RJC
VGS = 20V, VDS = 0V ID = 25A, VGS = 10V (Figures 6, 7) ID = 25A, VGS = 10V ID 12.5A, VDD = 100V, RG = 50 , V = 10V GS RL = 8 , (Figures 10, 11, 12)
Source to Drain Diode Specifications
PARAMETER Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time NOTES: 2. Pulse test: pulse width 300s Duty Cycle 2%. 3. Repetitive rating: pulse width is limited by maximum junction temperature. SYMBOL VSD trr ISD = 12.5A ISD = 4A, dISD/dt = 100A/s TEST CONDITIONS MIN TYP 300 MAX 1.4 UNITS V ns
2
RFK25N18, RFK25N20 Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 ID, DRAIN CURRENT (A) 0 50 100 150
Unless Otherwise Specified
30 25 20 15 10 5 0 25
0.8 0.6 0.4 0.2 0
50
TC, CASE TEMPERATURE (oC)
75 100 125 TC, CASE TEMPERATURE (oC)
150
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
100 ID(MAX) CONTINUOUS ID, DRAIN CURRENT (A)
TC = 25oC TJ = MAX RATED ID, DRAIN CURRENT (A)
60 50
PULSE DURATION = 80s DUTY CYCLE 2% TC = 25oC VGS = 10V
VGS = 20V
VGS = 8V
VGS = 7V
10
40 30 VGS = 6V 20 VGS = 5V VGS = 4V
OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1
10 0.1
1
10 100 VDS, DRAIN TO SOURCE (V)
1000
0
1
3 4 5 6 2 VDS, DRAIN TO SOURCE VOLTAGE (V)
7
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA
FIGURE 4. SATURATION CHARACTERISTICS
IDS(ON), DRAIN TO SOURCE CURRENT (A)
rDS(ON), DRAIN TO SOURCE ON RESISTANCE ()
35
VDS = 10V PULSE DURATION = 80s DUTY CYCLE 2%
0.16 0.14 0.12 0.10 25oC 0.08 -40oC 0.06 0.04 0.02 0 VGS = 10V PULSE DURATION = 80s 0 10 20 30 ID, DRAIN CURRENT (A) 40 50 125oC
25
15 125oC 25oC 5 -40oC 0 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10
FIGURE 5. TRANSFER CHARACTERISTICS
FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs DRAIN CURRENT
3
RFK25N18, RFK25N20 Typical Performance Curves
3 NORMALIZED DRAIN TO SOURCE ON RESISTANCE ID = 25A VGS = 10V PULSE DURATION = 80s 2
Unless Otherwise Specified (Continued)
1.3 1.2 NORMALIZED GATE THRESHOLD VOLTAGE (V) 1.1 1.0 0.9 0.8 0.7 ID = 250A VGS = VDS
1
0 -50
0
50
100
150
TJ, JUNCTION TEMPERATURE (oC)
-50
0 50 100 TJ, JUNCTION TEMPERATURE (oC)
150
FIGURE 7. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
200 10 VGS, GATE TO SOURCE VOLTAGE (V) VDS , DRAIN TO SOURCE VOLTAGE (V)
3000 C, CAPACITANCE (pF)
VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD CISS
150
VDD = BVDSS
GATE SOURCE VOLTAGE RL = 8 IG(REF) = 2mA VGS = 10V
VDD = BVDSS
8
2000
6
100
4
1000 COSS CRSS 0 0 10 20 30 40 50
50
0.75BVDSS 0.50BVDSS 0.25BVDSS
0.75BVDSS 0.50BVDSS 0.25BVDSS
2
DRAIN TO SOURCE VOLTAGE 0 0 I 20 G(REF) IG(ACT) t, TIME (s) I 80 G(REF) IG(ACT)
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 10. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
4
RFK25N18, RFK25N20 Test Circuits and Waveforms
tON td(ON) tr RL VDS
+
tOFF td(OFF) tf 90%
90%
RG DUT
-
VDD 0
10% 90%
10%
VGS VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT
FIGURE 12. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS
12V BATTERY
0.2F
50k 0.3F
G
DUT 0
Ig(REF) 0 IG CURRENT SAMPLING RESISTOR
S VDS ID CURRENT SAMPLING RESISTOR Ig(REF) 0
FIGURE 13. GATE CHARGE TEST CIRCUIT
FIGURE 14. GATE CHARGE WAVEFORMS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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